Neurocomputing capability evaluation of FHN model-based MSNN architectures with different window functions through the XOR problem


BARAN A. Y., Abdalla O., Öztürk İ., Korkmaz N., KILIÇ R.

Engineering Science and Technology, an International Journal, cilt.73, 2026 (SCI-Expanded, Scopus) identifier

  • Yayın Türü: Makale / Tam Makale
  • Cilt numarası: 73
  • Basım Tarihi: 2026
  • Doi Numarası: 10.1016/j.jestch.2025.102259
  • Dergi Adı: Engineering Science and Technology, an International Journal
  • Derginin Tarandığı İndeksler: Science Citation Index Expanded (SCI-EXPANDED), Scopus, INSPEC, Directory of Open Access Journals
  • Anahtar Kelimeler: Field-Programmable Gate Array (FPGA), FitzHugh–Nagumo (FHN) neuron model, Memristive Spiking Neural Network (MSNN), Spike-Timing-Dependent Plasticity (STDP), Window functions, Winner-Takes-All (WTA)
  • Kayseri Üniversitesi Adresli: Evet

Özet

This study focuses on utilizing Memristive Spiking Neural Network (MSNN) structures based on the Fitzhugh-Nagumo (FHN) neuron model coupled with the Voltage ThrEshold Adaptive Memristor (VTEAM), and constrained by five different window functions, to solve the Exclusive OR (XOR) problem through both numerical simulations and real-time hardware implementations. Specifically, two input and two output neurons have been constructed as the 2 × 2 MSNN architectures, and the Joglekar, Biolek, Strukov, Prodromakis, and Blackman window functions define their memristor models. The optimal memductance values for synaptic connections in these five network configurations are set using the Spike-Timing-Dependent Plasticity (STDP) learning rule combined with the Winner-Takes-All (WTA) algorithm. The performance of these networks is evaluated based on their efficiency in solving the XOR problem. In this context, the XOR problem has been conducted as an image formed by a 2-pixel array. These pixels are transmitted as noisy signals from the MSNN input layer, where input neurons convert them into spike activities. These spike activities are then integrated through the memristive synapse layer and forwarded to the output layer as excitatory current signals, enabling the output layer to classify the input correctly. The simulation and Field-Programmable Gate Array (FPGA) hardware implementation results exhibit strong consistency. This work demonstrates, for the first time, the capacity of MSNNs to solve nonlinear problems by providing both simulation-based and hardware-based solutions to the XOR problem using various MSNN architectures with different window functions.